I ran the neural network on the actual FPGA

Overview

Previously, the source code output by the neural network generator published in "I made a neural network generator that runs on FPGA" is the actual FPGA Atlas-SoC. I tried to run it with (DE0-Nano-SoC).

The repository is here https://github.com/kotauchisunsun/DE0_NN

license

Affero GPL v3

function

The DE0-Nano-Soc switch is input and the LED is output to behave as a neural network. When the switch is turned on, 1 is assigned, and when it is turned off, 0 is assigned.

Enter SW [0] 1 Enter SW [1] 2 SW [2] is the output of the neural network on the upper left and the weighting coefficient of the neural network on the upper right. SW [3] is the output of the neural network in the lower left and the weighting coefficient of the neural network in the upper right.

It is assigned to. Also,

When the neural network on the upper right ignites, LED [0] lights up. When the neural network in the lower right ignites, LED [1] lights up.

It is a function like that.

Preparation

Source code generation

This work does not need to be copied from the above repository.

Use the neural network generator used in "I made a neural network generator that runs on FPGA".

https://github.com/kotauchisunsun/NN_FPGA

Will be cloned.

$ cd NN_FPGA
$ python script/main.py 16 2 2 2
> NN_NL_016_0002_0002_NL_016_0002_0002
> saved to generate.v
> None

This will generate a file called generate.v and a module called NN_NL_016_0002_0002_NL_016_0002_0002 for the main neural network.

Download stationery

Atlas-SoC and DE0-Nano-SoC are the same in terms of hardware, only the firmware is different. Therefore, you can change DE0-Nano-SoC and Atlas-Soc by rewriting the firmware with the SD card. This time, we will use the data called System CD of DE0-Nano-SoC linked below.

http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=205&No=941&PartNo=4#soc

Copy of demo project

Unzip the file you downloaded earlier and

DE0-Nano_SoC_v.1.0.9_SystemCD\Demonstrations\SoC_FPGA\my_first_hps-fpga_base

Copy and use my_first_hps-fpga_base.

Editing source code

Add the previous repository https://github.com/kotauchisunsun/DE0_NN or the generated generate.v to the project.

I will not explain how to add it in detail, but you can add it from [Project]-> [Add Current File to Project] on the menu bar.

After that, edit ghrd.v in the project. This is a bit special, copy the contents of the repository diff_ghrd.v on line ** 271 of ghrd.v, before endmodule **.

(The reason why it is written in a roundabout way is that I do not know the license of ghrd.v itself, so if I put it in the repository, problems may occur.)

Actual machine operation

After that, compile and burn it to DE0-Nano-SoC with Programmer.

Actually operating on DE0-Nano-SoC

test case

I don't know until I actually move it, so I prepared a test case. If you try these, you can see how the neural network is actually running.

(Remarks) When SW [2] = on SW [3] = on, you can see that LED [0] and LED [1] are OR outputs of SW [0] and SW [1].

Summary

DE0 using the neural network generator (or code generated from it) created in "I made a neural network generator that runs on FPGA" -We created a neural network that works with Nano-SoC (Atlas-SoC) and confirmed that it actually works.